Type:
Conference
Description:
In this paper, we present a deep investigation of ultra-scaled Finflash memories, fabricated on Silicon on Insulator (SOI) substrate, with Silicon NanoCrystal (Si-NC) or nitride layers acting as storage nodes. Electrical characteristics of devices with channel length (L G ) as short as 30 nm, and fin width (W FIN ) as narrow as 10 nm are shown. Effective Channel Hot Electron (CHE) writing with sub-3.2 V drain biases (i.e. DeltaV TH =3V at V G /V D /t stress =9V/2.5V/100 mus), as well as Hot Hole Injection (HHI) erasing with sub-4.5V drain biases are demonstrated. Finally, fully three dimensional Monte Carlo simulations, coupled with an original semi-analytical approach, allow us to give a qualitative explanation of the obtained experimental data.
Publisher:
IEEE
Publication date:
11 Sep 2007
Biblio References:
Pages: 414-417
Origin:
ESSDERC 2007-37th European Solid State Device Research Conference