Chemical vapour deposition (CVD) on catalytic metals is one of main approaches for high-quality graphene growth over large areas. However, a subsequent transfer step to an insulating substrate is required in order to use the graphene for electronic applications. This step can severely affect both the structural integrity and the electronic properties of the graphene membrane. In this paper, we investigated the morphological and electrical properties of CVD graphene transferred onto SiO 2 and on a polymeric substrate (poly (ethylene-2, 6-naphthalene dicarboxylate), briefly PEN), suitable for microelectronics and flexible electronics applications, respectively. The electrical properties (sheet resistance, mobility, carrier density) of the transferred graphene as well as the specific contact resistance of metal contacts onto graphene were investigated by using properly designed test patterns. While a sheet resistance R sh≈ 1.7 kΩ/sq and a specific contact resistance ρ c≈ 15 kΩ· μm have been measured for graphene transferred onto SiO 2, about 2.3× higher R sh and about 8× higher ρ c values were obtained for graphene on PEN. High-resolution current mapping by torsion resonant conductive atomic force microscopy (TRCAFM) provided an insight into the nanoscale mechanisms responsible for the very high ρ c in the case of graphene on PEN, showing a ca. 10× smaller “effective” area for current injection than in the case of graphene on SiO 2.